Based on the high quality build your own CPU guide by Ben Eater. Ben cites the SAP-1 CPU architecture as the design inspiration for the CPU, which originated from the book Digital Computer Electonics by Albert Paul Malvino.
The SAP (Simple As Possible) computer has been designed for you, the beginner. Its purpose, to introduce the crucial ideas behind a CPUs operation without burying you in unnecessary detail.
First up to tackle the clock, the backbone of synchronising all digital operations within the CPU. The classic 555 timer IC has been selected, due to its versatility.
The clock will provide an adjustable speed (1Hz upto 200Hz), and a handy debugging push button manual mode to advance a single clock cycle.
The 555 essentially contain a couple of comparators which feed into an SR latch. The first trigger comparator is set to a high voltage of 1.67v, and the second threshold comparator set to a low voltage of 3.33v. When the 3.3v threshold is hit, a discharge transistor is enabled, which drains the capacitor (external to the 555 IC). This capacitor will continually drain and fill, based on this relationship. The drain and fill (duty cycle) rates of the capacitor can be controlled by resistors.
The timing period in seconds can be calculated as 0.693 (Ra + 2Rb) C
For example a 555 configured with an Ra of 1K ohms, Rb of 100K ohms, and a 1uF capacitor:
0.693 (1000 + 2 * 100000) 0.000001 0.139293 seconds
555 timer modes:
- Astable generates a constant stream of square waves
- Monostable provides two states, one stable (push button controlled), and one unstable variable stream of square waves
- Bistable, aka a flip flop, stable in both states, output high and output low
Using an oscilloscope will observe the transition from low to high is rather dirty. To overcome this, the data sheet recommends dropping in a 0.01uF capacitor between pin 5 and ground. In addition placing a 0.1uF capacitor across the positve and negative power pins. When the transistors state change, they immediately attempt to pull in as much current as they can to drive from low to high. At the nano second scale on the oscilloscope, can see this results in a slight lag in pulling the needed current, and also results in a voltage spike/overshoot. To feed this state transition with the needed current, filling up a capacitor (in this case, a 0.1uF across positve and negative pins) will provide an immediate pool of current for use, resulting in a faster low to high, and consequently less of an overshoot/spike.
Measured in ohms. Resistors commonly come in 4 and 5 band variations. A 4 band simply skips out of the 3rd significant digit.
- 1st significant digit
- 2nd significant digit
- 3rd significant digit
Measured in pico farads.
Ceramic caps, due to tiny print real-estate use a 3 digit numeric code, such as 104. A 1st and 2nd significant digit, followed by a multiplier. Therefore a 104 = 100,000pF = 100nf = 0.1uF